fp_img.jpgThis is really interesting news, and I’ll try to not get too technical but I do want to cover why this is interesting. Currently, Intel’s state of the art fab is a 65 nanometer process that uses a CMOS transistor. There are a couple problems with this current configuration, the biggest being the gate dielectric or insulator that keeps current from leaking between the electrode, source, and the drain. Why is this a problem? Currently on the 65 nanometer chip that insulating layer is only 1.2 nanometers thick, which is to really say 1.2 nanometers thin or roughly five atomic layers. The thinner the gate dielectric the less efficient it is an insulating layer and what you end up with is a transistor that is never really switched off, like a light bulb that is either on or just dim. This wastes a tremendous amount of electricity and contributes to the waste heat given off by the processor.

The new revolution has come in replacing the silicon dioxide gate dielectric with a hafnium based high-k material that Intel claims reduces current leakage by ten times. And because the hafnium gate dielectric is a more efficient insulator than the silicon dioxide this allows the transistors to shrink even smaller without losing so much electricity. The new transistors require less energy to switch off and on, and consume 30% less power than the last generation chips.

I’ve generalized a lot here, and basically all I’ve done is give a thumbnail of the article on bit-tech, so surf on over there and check out the full story.

bit-tech.net